Active-HDL™ v9.2 - 2.1 Design Entry Block Diagram Editor

aldecinc

May 15, 2012
12,667 Views

Here you can watch the video online Active-HDL™ v9.2 - 2.1 Design Entry Block Diagram Editor which uploaded aldecinc size ~17.05 MB and duration 4 min и 58 sec.

Tags:

#ASIC_Design_Flow #Logic #Block_Diagram #Netlist
Links and html tags are not supported


Comments: